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HS-2400RH
Data Sheet September 1999 File Number 4027.1
Radiation Hardened PRAM Four Channel Programmable Operational Amplifier
HS-2400RH is a four-channel programmable amplifier providing a level of versatility unsurpassed by any other monolithic operational amplifier. Versatility is achieved by employing four input amplifier channels, any one (or none) of which may be electronically selected and connected to a single output stage through DTL/TTL compatible address inputs. The device formed by the output and the selected pair of inputs is an op amp which delivers excellent slew rate, gain bandwidth and power bandwidth performance. Other advantageous features for these dielectrically isolated amplifiers include high voltage gain and input impedance coupled with low input offset voltage and offset current. External compensation is not required on this device at closed loop gains greater than 10. Each channel of the HS-2400RH can be controlled and operated with suitable feedback networks in any of the standard op amp configurations. This specialization makes these amplifiers excellent components for multiplexing signal selection and mathematical function designs. With 20V/s slew rate, 20MHz gain bandwidth and low input bias currents make these devices ideal building blocks for signal generators, active filters and data acquisition designs. Programmability, coupled with 9mV maximum offset voltage and 50nA offset current, make these amplifiers outstanding components for signal conditioning circuits. Specifications for Rad Hard QML devices are controlled by the Defense Supply Center in Columbus (DSCC). The SMD numbers listed here must be used when ordering. Detailed Electrical Specifications for these devices are contained in SMD 5962-95684. A "hot-link" is provided on our homepage for downloading. http://www.intersil.com/spacedefense/space.htm
Features
* Electrically Screened to SMD # 5962-95684 * QML Qualified per MIL-PRF-38535 Requirements * Total GAMMA Dose . . . . . . . . . . . . . . . . . . . .10k RAD(SI) * Digital Programmability * High Rate Slew - Uncompensated . . . . . . . . . . . . . . . . . . . . . .20V/s Min - Compensated . . . . . . . . . . . . . . . . . . . . . . . . .6V/s Min * Wide Gain Bandwidth - Uncompensated . . . . . . . . . . . . . . . . . . . . . .20MHz Min - Compensated . . . . . . . . . . . . . . . . . . . . . . . . .4MHz Min * High Gain . . . . . . . . . . . . . . . . . . . . . . . . . . . . .50kV/V Min * Low Offset Current . . . . . . . . . . . . . . . . . . . . . . .50nA Max * Single Capacitor Compensation for Unity Gain * DTL/TTL Compatible Inputs
Applications
* Signal Selection/Multiplexing * Operational Amplifier Gain Stage * Oscillator Frequency * Filter Characteristics * Add-Subtract Functions * Integrator Characteristics * Comparator Levels
Pinout
16 LEAD CERAMIC DUAL-IN-LINE FRIT SEAL PACKAGE (CERDIP) MIL-STD-1835 GDIP-T16 TOP VIEW
Ordering Information
ORDERING NUMBER 5962D9568401VEA INTERNAL MKT. NUMBER HS1-2400RH-Q TEMP. RANGE (oC) -55 to 125
+IN3 1 -IN3 2 + 3 3 16 D0 DECODE CONTROL 15 D1 14 ENABLE 13 GND 12 11 COMP V+
+IN4 3 -IN4 -IN1 4 5
+ 4 -
+IN1 6 -IN2 7
1 +
+IN2 8
2 + OUTPUT AMP
10 OUT 9 V-
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. www.intersil.com or 321-724-7143 | Copyright (c) Intersil Corporation 1999
HS-2400RH Test Circuit
0.002 2 10K 100 0.002 1 2 2 10K 100 0.002 1 2 10K 100 0.002 1 2 2 10K 100 0.002 1 2 10K 100 0.002 1 2 2 10K 100 0.002 1 ACOUT 2 10K 100 0.002 1 2 2 10K 100 1 S7 V5 2 1 S4 2 1 S3 2 1 S2 2 1 S1 2 OPEN OPEN OPEN 4.9K E X2 OUT OPEN 2 A2 1 1 S8 VIN 200 S44 OPEN 2 1 2K 1 50pF (NOTE 2) 2 V4 (NOTE 1) -1 + FB S34 1 S54 1 2 1 S64 3 4 2 4 + S14 10 1 S11 S9 500K 2 -1 10 50K S43 V3 S33 1 S53 1 2 1 S63 1 2 3 + 2 DUT 12 S42 15pF S32 1 S52 1 2 1 S62 8 16 V9 7 +2 2 15 V8 S41 14 V7 S31 1 S51 1 2 1 S61 6 5 1 + V2 47pF 2 1F 9 11 1F 47pF V1
13
V6
10 +
NOTES: 1. For loop stability, use Min value capacitor to prevent oscillation. 2. Includes stray capacitance. 3. All capacitors = 10% (F). 4. All resistors = 1% (). 5. DUT pin numbers refer to 14 pin CERDIP Package.
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HS-2400RH Test Waveforms
+5.0V +5.0V INPUT -5.0V +SR -SR -5.0V T SR = T T T +5.0V -5.0V V OUTPUT V -5.0V +5.0V
SLEW RATE WAVEFORMS
VFINAL = +200mV +200mV INPUT 0V tR , +OS tF, -OS -200mV 0V VPEAK 90% OUTPUT 10% 0V 90% -200mV VPEAK tR tF 0V 10%
OVERSHOOT, RISE AND FALL TIME WAVEFORMS
Burn-In Circuit
HS-2400RH CERDIP
16 DECODE CONTROL 15 14 13 12 11 10 OUTPUT AMP 9 D0 D1 ENABLE GND COMP V+ OUT VD2 R1 C2 C3 D1 C1 V+
1 2 3 4 5 6 7 8
+ 3 3 -
f0 f1 f2
+ 4 -
1 +
2 +
V-
NOTES: 6. R1 = 100k,/Socket, 5%, 1/4W (Min). 7. C1 = C2 = 0.01F/Socket (Min) or 0.1F/Row (Min). 8. C3 = 0.001F/Socket, 10%. 9. D1 = D2 = 1N4002 or equivalent (per board). 10. |(V+) - (V-)| = 30V. 11. Duty Cycle 50% for: f0 = 100kHz, f1 = 50kHz, f2 = 25kHz.
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HS-2400RH Irradiation Circuit
R 1 2 3 4 5 6 7 8 16 R 15 R 14 13 12 11 C 10 9 C GND GND GND V2 V1
NOTES: 12. V1 = +15V. 13. V2 = -15V.
14. R = 1 Meg . 15. C = 0.1F.
Schematic Diagram
IN+ Q1 R2 2.4K R3 1.8K Q2 R4 22.9K ENABLE Q3 Q5 Q4 Q102 Q27 Q6 Q7 Q8 Q9 R6 2.0K R5 8.0K Q26 R14 10K Q20 Q21 Q19 Q22 Q24 VD Q23 Q39 Q11 Q40 Q38 Q41 Q88 Q89 Q32 Q34 Q25 Q33 Q103 Q36 Q37 R35 0.75K Q87 Q35 Q86 R30 1.2K C1 9.0pF V+ VE Q28 INCOMP Q82 Q81 Q84 Q29 Q30 Q31 Q80 Q83 R33 4K Q92 Q93 Q94 Q95 Q96 Q97 Q100 Q85 R34 1.6K Q98 Q99 Q101 R32 34 OUT R31 36.5 +VCC
R1 1.6K
R12 1.6K
R13 0.8K
R18 2.0K
Q79
R35 1.6K GND
Q18 R7 5.6K Q10
Q12
Q13
VC
Q90
Q91
Q14 Q17 VB Q15 R8 4K Q16 R10 10K VA R11 10K R15 10K R16 10K R17 1.6K Q42 R19 1.6K R29 0.4K TO ADDITIONAL INPUT STAGES
R9 1.5K
D0
D1
-VEE
NOTE: 16. Diagram Includes: One Input Stage, Decode Control, Bias Network, and Output Stage.
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HS-2400RH Die Characteristics
DIE DIMENSIONS: 88 mils x 67 mils x 19 mils 1 mils 2240m x 1710m x 483m 25.4m INTERFACE MATERIALS: Top Metallization: Type: Al, 1% Cu Thickness: 16kA 2kA Glassivation: Type: Nitride (Si3N4) over Silox (SiO2, 5% Phos.). Silox Thickness: 12kA 2kA Nitride Thickness: 3.5kA 1.5kA Substrate: Potential (Powered Up) Unbiased ADDITIONAL INFORMATION: Worst Case Current Density: < 2 x 105A/cm2 Transistor Count: 251 Process: Bipolar Dielectric Isolation
Metallization Mask Layout
HS-2400RH
-IN2 +IN1 -IN1 -IN4 +IN4 -IN3
+IN2
+IN3
V-
D0
OUT
V+
COMP GND ENABLE
D1
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Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site www.intersil.com
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